Designing of Processor-Time Optimal Hexagonal Systolic Array for Matrix Multiplication
AbstractA procedure for synthesizing 2D hex systolic array of Kung´s type for square matrix-matrix multiplication is proposed. The procedure is based on data dependence approach. The systolic array synthesized by this procedure is processor-time optional. The obtained array has n2 processing elements, compared with 3n2-3n+1 in the original Kung´s array. The active execution time of the array is 3n-2 time units.
Download data is not yet available.
How to Cite
Milovanovič, E. I., Milentijevič, I. Z., & Milovanovič, I. Ž. (2012). Designing of Processor-Time Optimal Hexagonal Systolic Array for Matrix Multiplication. COMPUTING AND INFORMATICS, 16(1), 1–11. Retrieved from https://www.cai.sk/ojs/index.php/cai/article/view/671