Dependability Evaluation of Time Triggered Architecture Using Simulation

Authors

  • Stanislav Racek
  • Pavel Herout
  • Jan Hlavička

Keywords:

Dependability, simulation, TTA, fault-injection, C-Sim

Abstract

The method presented in this paper uses a generic C-language written simulation model of an embedded distributed computer system aimed for a safety-critical control application. The considered system is built using Time Triggered Architecture (TTA) concepts. The aim of the presented simulation method is to evaluate the system capability to tolerate a chosen category of faults. The model, being written in ANSI-C, is portable and machine-independent. Its structure is modular and flexible, so that the system to be studied and the experiment setting can easily be changed. The functionality of this model is demonstrated on a set of fault injection experiments aimed mainly to evaluate the correctness of the Time Triggered Protocol (TTP/C) that implements the abstract concepts of TTA. These experiments were done within the EU/IST project Fault Injection for Time triggered architecture (FIT).

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Published

2012-02-06

How to Cite

Racek, S., Herout, P., & Hlavička, J. (2012). Dependability Evaluation of Time Triggered Architecture Using Simulation. COMPUTING AND INFORMATICS, 23(1), 51–76. Retrieved from https://www.cai.sk/ojs/index.php/cai/article/view/408