The Enhancement of a Computer System for Sorting Capabilities Using FPGA Custom Architecture

Abstract

The primary goal of the presented experiment was to judge the usefulness of FPGA technology in the sorting operation performed by computer systems. We were interested to see if it was possible to achieve better system performance and lower energy consumption when the CPU is supported by FPGA chips. The method of custom processing was applied. We proposed dedicated sorting hardware to increase performance and save energy. Our concept addresses High Throughput Computing (HTC) systems. The custom hardware approach was proposed because this technique is available in supercomputing infrastructures today. Another important issue of the work is that the hardware was programmed using High Level Language (HLL). As a semiconductor platform for hardware implementation the FPGA was chosen. We evaluated the efficiency of an FPGA based sorting processor that was programmed in Mitrion-C HLL. The FPGA approach was compared to the CPU approach in terms of efficiency and power consumption.