1.
Milovanovič EI, Milentijevič IZ, Milovanovič I Ž. Designing of Processor-Time Optimal Hexagonal Systolic Array for Matrix Multiplication. Comput. Inform. [Internet]. 2012 Mar. 5 [cited 2024 Apr. 19];16(1):1-11. Available from: https://www.cai.sk/ojs/index.php/cai/article/view/671