STRNADEL, Josef. Testability Analysis and Improvements of Register-Transfer Level Digital Circuits. COMPUTING AND INFORMATICS, [S. l.], v. 25, n. 5, p. 441–464, 2012. Disponível em: https://www.cai.sk/ojs/index.php/cai/article/view/353. Acesso em: 3 may. 2024.