TY - JOUR
AU - Jamro, Ernest
AU - Pabiś, Tomasz
AU - Russek, Paweł
AU - Wiatr, Kazimierz
PY - 2015/02/04
Y2 - 2023/06/08
TI - The Algorithms for FPGA Implementation of Sparse Matrices Multiplication
JF - COMPUTING AND INFORMATICS
JA - Comput. Inform.
VL - 33
IS - 3
SE - Articles
DO -
UR - https://www.cai.sk/ojs/index.php/cai/article/view/2795
SP - 667-684
AB - In comparison to dense matrices multiplication, sparse matrices multiplication real performance for CPU is roughly 5--100 times lower when expressed in GFLOPs. For sparse matrices, microprocessors spend most of the time on comparing matrices indices rather than performing floating-point multiply and add operations. For 16-bit integer operations, like indices comparisons, computational power of the FPGA significantly surpasses that of CPU. Consequently, this paper presents a novel theoretical study how matrices sparsity factor influences the indices comparison to floating-point operation workload ratio. As a result, a novel FPGAs architecture for sparse matrix-matrix multiplication is presented for which indices comparison and floating-point operations are separated. We also verified our idea in practice, and the initial implementations results are very promising. To further decrease hardware resources required by the floating-point multiplier, a reduced width multiplication is proposed in the case when IEEE-754 standard compliance is not required.
ER -